WZ-HFT: Market Data to Order in 12 Cycles. The Prototype Took 240 ns @ 50 MHz.WZ-HFT: Market Data to Order in 12 Cycles We have been building RISC-V cores, IP, VIP, accelerators and SoC reference designs. For WZ-HFT, we pushed those components through a latency-sensitive tradinAug 27 路 1 min readrvp.hashnode.dev
We started by building a multi-model AI chip on SKY130A multi-model AI chip on SKY130. At almost every stage, we hit something. Sometimes we found another route. Sometimes we changed the architecture. Sometimes we worked around the limitation. And sometiAug 20 路 1 min readrvp.hashnode.dev
WIOWIZ EDA: Power-aware coverage is finally in the coverage GUICode coverage and functional coverage are old buddies.Formal and UNR are more recent acquaintances.But as SoCs become increasingly dynamic, another dimension is becoming difficult to ignore: Power andAug 12 路 2 min readrvp.hashnode.dev
WIOWIZ EDA : Analog Mixed Simulation with FSimX and WZ-SPICEMulti-vendor AMS co-simulation has a fundamental architectural boundary. You have a digital verification environment on one side and an isolated SPICE waveform generator on the other. They interact Aug 12 路 2 min readrvp.hashnode.dev
WIOWIZ SOC Virtual Platform - Boot a Complete SoC from One BinaryMost SoC evaluations start the same way.You receive RTL, documentation, and a list of tools to install before you can answer a simple question: 饾棗饾椉饾棽饾榾 饾榿饾椀饾棽 饾榾饾槅饾榾饾榿饾棽饾椇 饾棶饾棸饾榿饾槀饾棶饾椆饾椆饾槅 饾椏饾槀饾椈?WAug 7 路 1 min readrvp.hashnode.dev
